Synchronization in all-digital QAM receivers

The recent advance in Field Programmable Gate Array (FPGA) technology has been largely embraced by the communication industry, which views this technology as an effective and economical alternative to the design of Application Specific Integrated Circuits (ASICs). The primary reasons for switching to FPGAs are lower development and non-recurring engineering costs, the flexibility to design to a preliminary standard and adapt the design as the standard evolves, as well as the option of performing software updates in the field. A sector with strong interest in FPGAs is the coaxial cable TV/Internet distribution industry. The creation of soft preliminary standards by the standards organization governing the industry has been the main catalyst for the massive adoption of FPGAs by small to medium size companies, which see this technology as an opportunity to compete in this open market. Both the circuit speed and the economy of FPGA technology depend upon using algorithms that map efficiently into its fabric. Often it is prudent to sacrifice performance to improve either clock speed or economy when developing with FPGAs. The purpose of this research is to both revise and devise synchronization algorithms / structures for cable digital receivers that are to be implemented in FPGA. The main communication scheme used by the coaxial cable distribution industry is digital Quadrature Amplitude Modulation (QAM). The problem of synchronizing to the QAM signal in the receiver is not a new topic and several synchronization-related circuits, which were devised with ASICs implementation in mind, can be found in the open literature. Of interest in this thesis is the non-data-aided digital timing synchronizer that was proposed by D'Andrea to recover timing with no knowledge of the transmitted data. Accurate timing estimation was achieved by reshaping the received signal with a prefilter prior to estimating the timing. A problem with D'Andrea's synchronizer is that the prefilter for reshaping the signal is a relatively long Finite Impulse Response (FIR) filter, whose implementation requires a large number of multipliers. This may not have been an issue with ASICs in as much as the number of hardwired multipliers on a chip is not limited as it is in an FPGA chip. One contribution in this research is to propose an alternative to D'Andrea's synchronizer by replacing the long FIR filter with two single-pole Infinite Impulse Response (IIR) filters that are directly placed inside the timing recovery loop. This novel architecture, which drastically reduces the number of multipliers, is well suited for FPGA implementation. Non-data-aided feedforward synchronizers, which use the same prefilter as D'Andrea's synchronizer, have been receiving significant attention in recent years. Detailed performance analysis for these synchronizers can be found in the open literature. These synchronizers have the advantage of using a feedfordward structure rather than a feedback structure, as it is the case in D'Andrea's synchronizer, to estimate the timing. While D'Andrea's synchronizer has an advantage in performance over a non-data-aided feedforward synchronizer, this has not been reported in the literature. In this thesis a second contribution consists of thoroughly analyzing the steady state timing jitter in D'Andrea synchronizer by deriving a closed-form expression for the noise power spectrum and a simple equation to estimate the timing jitter variance. A third contribution is a novel low-complexity and fast acquisition coherent detector for the detection of Quadrature Phase Shift Keying (QPSK) (i.e., 4-QAM) symbols. This detector performs carrier phase synchronization much faster than a conventional coherent detector. The acquisition time is comparable to that of a differential detector. The fast acquisition comes at the expense of phase jitter, and the end result is a 1 dB performance loss over theoretical coherent detection. This detector can be used in place of the differential detector with no economic penalty. Doing so yields a performance advantage of about 2 dB over differential detection

Asynchronous Sampling Rate Conversions in Digital Communications Systems

The problem of resampling digital signals at an output sampling rate that is incommensurate with the input sampling rate is the topic of this paper. This problem is often encountered in practice, as for example in the multiplexing of video signals from different sources for the purpose of distribution. There are basically two approaches to resample the signals. Both approaches are thoroughly described and practical circuits for hardware implementation are provided. A comparison of the two circuits presented in the paper shows that one circuit requires a division to compute the new sampling times. This time scaling operation adds complexity to the implementation with no performance advantage over the other circuit, and makes the “division free” circuit the preferred one for resampling

ALADIN is Required for the Production of Fertile Mouse Oocytes

Asymmetric cell divisions depend on the precise placement of the spindle apparatus. In mammalian oocytes, spindles assemble close to the cell's center, but chromosome segregation takes place at the cell periphery where half of the chromosomes are expelled into small, nondeveloping polar bodies at anaphase. By dividing so asymmetrically, most of the cytoplasmic content within the oocyte is preserved, which is critical for successful fertilization and early development. Recently we determined that the nucleoporin ALADIN participates in spindle assembly in somatic cells, and we have also shown that female mice homozygously null for ALADIN are sterile. In this study we show that this protein is involved in specific meiotic stages, including meiotic resumption, spindle assembly, and spindle positioning. In the absence of ALADIN, polar body extrusion is compromised due to problems in spindle orientation and anchoring at the first meiotic anaphase. ALADIN null oocytes that mature far enough to be fertilized in vitro are unable to support embryonic development beyond the two-cell stage. Overall, we find that ALADIN is critical for oocyte maturation and appears to be far more essential for this process than for somatic cell divisions

SIGNAL DISTORTION CAUSED BY TREE FOLIAGE IN A 2.5 GHZ CHANNEL

Fixed terrestrial broadband wireless systems work very well when a clear line-of-sight is available. In near line-of-sight transmission where a few foliated trees block the line-of-sight, the signal can experience large and rapid fading. This paper investigates the timevariant nature of the frequency response of a 6 MHz wireless channel obstructed by a few fully foliated trees. Measurements were taken on fixed wireless paths with trees in the vicinity of the receive antenna, and under different weather conditions. It was found that signal fading is a function of the foliage density, the amount of wind, the multipath in the channel, and whether the leaves are wet or dry. The fades were largely flat across the band but with some frequency selective fading. Fading rates of 0.5 to 2 fades / s were measured, and occasionally the slope reached 50 dB / s. Keywords: MMDS, Measurement through foliage, DSP. 1